There are several pieces of workbench any intermediate hobbyst can build. Waveform generator is one of them.
Unofficial mantra for this project was “make it sufficient”. Think three basic waveforms (sine, triangle, square), four settings (frequency, duty cycle, amplitude, DC offset) and upper frequency in range of few MHz. Built-in frequency meter would be handy. Also – no craploads of components please; we are not building analog synth here. And no DDS… yet. This might become another project next year, unless featuritis brings me to the point where it’s more practical to spend $500+ on a factory made box.
On the other hand, all related popular analog ICs are now discontinued. And most are/were older than Mother Earth, like XR2206 or – OMG! – ICL8038. A notable exception is MAX038 (released 1994). Big suppliers don’t have it anymore. Wanna get one, try less known and second-hand sources: local stores/hobbysts, Futurlec, Littlediode, eBay. CPP version costs around $20.
As for other nonstandard components, external amplitude/duty cycle control requires fast “video” type opamp. LT1364 meets orientational specs (300V/us slew rate, 50MHz gain bandwidth) at +/-8V supply.
Limitations and fixes (when available)
MAX038 datasheet claims 20MHz with banged up but still distinctive triangle/square waves (pages 5, 6). I tried that under stated conditions – with three ICs all obtained from different sources – and it looked like OUT stage is clearly lacking bandwidth. Up to 4MHz squares and triangles were OK, then high-order harmonics went bye-bye… after ~11MHz both waveforms looked more or less like sine wave. This ain’t show stopper, 4MHz is within my loose specs. Upper frequency in design will be limited to 10MHz.
Duty cycle (DADJ) and frequency control (IIN, FADJ) aren’t entirely independent. To keep drift at minimum, simply don’t go near extreme values. If DADJ is stated for [+2.3... -2.3V], use only [+2.0V... -2.0V] portion of it. The same way, IIN range should be kept away from [3.75uA... 750uA] edges. Divide both values by two if FADJ is disabled.
Active SYNC output is known to cause dreaded glitch in OUT waveform (page 12). What’s quietly omitted there is the fact emitted noise/ripple regularly affects internal triangle generator (page 8). It is connected to SYNC comparator forming a feedback loop. As a result, rising edge of SYNC signal oscillates until triangle wave rises high enough. Problem is more prominent at lower OUT frequencies. Both issues can be reduced/eliminated in a first place with proper PCB design: ground plane, close bypass caps and no stray inductances (long leads, IC socket).
Prototyping was all common sense, the art of reading datasheet, opamp math, basic Ohm’s laws, stuff like that:
Let’s analyze schematics piece by piece.
PSU design is standard linear. IC1 and IC2 (7808/7908, TO-220 package) provide +/-8V for all operational amplifiers. IC3 and IC4 (78L05/79L05, TO-92) give +/-5V for MAX038 and frequency meter components.
Recommended input voltage is +/- 10-15V. Be aware that PSU does not have any special means of protection. If you want to prevent famous ohnosecond moments – like connecting generator to bench PSU and accidentaly turning it up towards 30V – think about dedicated +/-12V supply.
Bypass capacitors, MAX038 pins: V+, V-,DV+
MAX038 requires heavy decoupling. V+, V- and DV+ each have 1nF block cap to pick quick transients and 1uF tantalum as larger buffer. LT1364 can also pack a punch; it’s V+/V- pins have single bypass caps. NE5532′s are lot less demanding, though few extra caps won’t hurt – placements are there in schematic/PCB, their use is optional.
Waveform selection: pins A0, A1
These two pins accept TTL/CMOS levels. Value 00 select square wave, 01 triangle and 10/11 sine wave. All three waveforms can be made selectable with three-position SPDT (1-0-2) or rotary switch. Notes:
- relying on opened pins (treated as 1′s) is not recommended, therefore both pins are pulled down with 10k resistors.
- it’s better to use MBB (make before break) switches than BBM (break before make). With latter waveform shortly changes to square (00) during mechanical transition between contacts.
2.5V bandgap voltage reference: pin REF
MAX038 offers 2.5 volts at pin REF. This is good basis for supply-independent design. First we connect REF to inverting opamp (IC6B, A=-1) then use both symmetrical points (+REF, -REF) as references for frequency, duty cycle and DC offset controls. REF must not be overloaded; maximum current is 4mA.
Frequency band selection: pins COSC
Frequency spectrum is divided into 7 decade bands from 1-10Hz to 1-10MHz. Each band is slightly stretched (~10% relative on both sides) to allow for various drifts and tolerances. Active band is selectable via rotary switch which picks one of capacitors (39pF… 47uF) and connects it to pin COSC. Some observations:
- Caps are known to have notorious tolerances and pickin ‘em manually with LCR meter won’t hurt.
- smallest capacitor is slightly smaller than calculated (39pF instead of 47pF) to compensate for parasitic capacitances on PCB.
- again, MBB switch is preferred. BBM ones disconnect COSC before contacts settle down causing frequency to ramp up for fraction of second.
Fine frequency adjustment: pin FADJ
There was no need for it. Contrary to popular assumption 0V/GND does NOT disable FADJ; this merely leaves it in “centered” state. The right way means pulling FADJ down to ~-3V with grounded 12k resistor. This has three additional effects: a) frequency doubles up, b) useful IIN range changes to [2.5 ... 375uA], c) temperature coefficient improves by factor 3. All good.
Coarse frequency adjustment: pin IIN
This control is current-based. We are aiming for [22.5uA... 275uA] which gives desired sweep ratio (10:1 + 10% overheads = 12.22:1) while keeping edges far enough from max. rated values (in FADJ-less mode). A good linearity is must-have. This can’t be done by simply using pot/resistor connected to REF. Instead, we use a simple voltage divider to get [+0.2V... +REF], pass that range through amplifier (IC7A, A=1.33) and burn voltage on fixed 12k resistor connected to IIN.
Duty cycle control: pin DADJ
DADJ control voltage range is [+2.0V... -2.0V], based on [+REF... -REF] and buffered with another operational amplifier (IC6A). Note that direction is reverted: highest voltage means lowest duty cycle.
PLL pins: PDI, PDO
Unused. PDI is grounded, PDO left open.
DC offset control
Fourth and last slow opamp (IC7B) provides [-REF...+REF] range for DC offset. That’s enough to push 5Vpp signal to [0V... 5V] or [-5V... 0V]. Output is routed to summing fast amplifier.
If we select square wave, max out amplitude and DC offset then OUT will generate TTL-compatible signal.
Amplitude and DC offset control: pin OUT (?)
A fixed OUT voltage (2Vpp symmetrical) is nerfed with pot. First fast opamp (IC8B, A=2.5) increases max. amplitude to 5Vpp. It seems like noninverting configuration behaves slightly better than inverting one above ~4MHz. Feedback resistors have intentionally small values; above 10k slew rate and phase becomes to suffer. Second fast amplifier (IC8A) sums up signal and DC offset. Given output is then routed to external BNC connector.
Side note: most of googled schemas use single amp in output stage, probably to keep signal degradation at minimum. The downside is less natural DC offset control, because it is added BEFORE amplification.
There must be psyhcological explanation why people tend to screw up decisions based on only two choice. Ah yes, there’s no third one to cacth onto reference.
In this case, Eagle library didn’t have vertical plastic pots (Piher). I created custom library, added symbol, device, part – and miswired A/E pins. Error went all the way through PCB design. Since pots are soldered directly, fixes were… less than aesthetically pleasing. Corrections are added in final schematic and PCB. Let’s check ‘em again:
- frequency: higher voltage -> higher current -> higher frequency -> E to +REF, A to +0.2V
- duty cycle: higher voltage -> lower duty cycle -> inverting output (IC8A) -> higher duty cycle -> E to +2.0V, A to -2.0V
- amplitude: greater value -> higher amplitude -> E to OUT, A to GND
- DC offset: higher voltage -> greater DC offset -> inverting output (IC8A) -> smaller DC offset -> E to -REF, A to +REF
Summing amplifier (IC8A) must be of inverting type, which effectively turns waveform upside down. Duty cycle of 20% actually becomes 80%. Other two waveforms visually don’t behave that way; 20% means triangle will be angled to the left, not right. Because duty cycle control makes the most sense for square waves, this had been taken as reference.
F-meter is implemented with PIC16F876 ICs and 2×16 chars LCD. This PIC model is a bit of overkill, plenty of pins and 85% of memory remained unused but nevermind. Three routes connect MAX038 and micro: A0->RA0, A1->RA1 and SYNC->RC0. First two give an information about waveform displayed in first row of LCD. Last one is source for counting. Module TMR0 derives 1-second timebase from master clock (6.144MHz). TMR1 is configured for async mode with no prescaler; it counts rising edges of SYNC signal (that’s why it’s important to minimize OUT glitch) – and overflows every 65536 counts. Most of number crunching is done within interrupt handler. Main loop merely checks for changed values and updates display.
Normally when prescaler is off PIC cannot count above FOsc/4. Looks like that limitation does not apply here; meter works all the way to 11MHz with 1Hz resolution. I tried to do the same with RTC 4.194 XT crystal and measuring peaked around ~1MHz as expected. Accuracy is of course smaller. Compared to software-based f-meter in Rigol scope, worst-case deviation is less than 0.1%.
LCD is labeled “1602″. Niiice. It has standard dimensions for 16×2 chars, 1-16 pin layout in top left corner, HD44780 interface and blue background. Not all hung-lo 1602′s have the same pinout; some have shifted pins 15 and 16, others have 1×16 pin strip bottom left or 2×8 sideways etc – in any case, check before buying some.
Enclosure was kinda handheld-sized (166x100x25mm), meaning all controls had to be soldered directly on PCB. This greatly affected board layout:
PCB itself is single-sided, 160x93mm with 10 jumpers and ground plane pour. None of ICs has socket for various reasons; MAX038 and to some extent LT1364 don’t like it (search above for “stray inductance”), for PIC one there wasn’t enough room – and NE5532′s are dirt cheap.
Rotary switches were kind of tricky. It took me some time to find small enough ones that fit into enclosure (no-name, just “Made in W.Germany”. Go figure). Unfortunately their setup was 1×12 without any setup ring or rotation limiter you can typically find on larger switches a la Lorlin or ELMA that would let me constraint movement to 1×3 and 1×7. I had to solder short raised dummy jumpers (both ends on ground plane) 2mm in front between pins 3/4 and 7/8 respectively.
Two male pin header connectors exist on board: 16-pin for LCD, 2pin for output signal (via tiny microphone cable + BNC). Supply connector is 6-pin mini-DIN at bottom left corner.
Although my artistic skills are roughly nil, I was satisfied with final look & feel. Crap picture quality comes from Nokia cell phone :X:
How generator works in practice? As mentioned before, up to 4MHz results are OK. Then bandwidth limitation slowly kicks in. Waveforms are stable, controls are linear. OUT glitch does not exist. All fine – within given (analog) limitations.
Things I’m occasionally missing are few on/off switches: for powering up and to enable/disable OUT signal. Regarding usability, large BNC adapters sometimes get in the way of display and controls. And LCD doesn’t have excellent viewing angle so it might take some contrast tweaking to get clear readout while generator is on the bench.
For anyone interested: